[all-commits] [llvm/llvm-project] 296faa: [ARM] Some formatting and predicate VRHADD pattern...

[David Green via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 296faa91ed55c05b40d286be020fc65d2fc262b5
      https://github.com/llvm/llvm-project/commit/296faa91ed55c05b40d286be020fc65d2fc262b5
  Author: David Green <david.green at arm.com>
  Date:   2020-08-09 (Sun, 09 Aug 2020)

  Changed paths:
    M llvm/lib/Target/ARM/ARMInstrMVE.td

  Log Message:
  -----------
  [ARM] Some formatting and predicate VRHADD patterns. NFC

This formats some of the MVE patterns, and adds a missing
Predicates = [HasMVEInt] to some VRHADD patterns I noticed
as going through. Although I don't believe NEON would ever
use the patterns (as it would use ADDL and VSHRN instead)
they should ideally be predicated on having MVE instructions.


  Commit: 8590e5abad51257fe9120313b37192f37aef8eec
      https://github.com/llvm/llvm-project/commit/8590e5abad51257fe9120313b37192f37aef8eec
  Author: David Green <david.green at arm.com>
  Date:   2020-08-09 (Sun, 09 Aug 2020)

  Changed paths:
    M llvm/lib/Target/ARM/MVETailPredication.cpp
    M llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll

  Log Message:
  -----------
  [ARM] Allow vecreduce_add in tail predicated loops

This allows vecreduce_add in loops so that we can tailpredicate them.

Differential Revision: https://reviews.llvm.org/D85454


Compare: https://github.com/llvm/llvm-project/compare/c990455db91e...8590e5abad51