[all-commits] [llvm/llvm-project] f92e0d: [VE] Optimize trunc related instructions

[Kazushi Marukawa via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: f92e0d9384763913a745cbe9c757fbb40691dcd1
      https://github.com/llvm/llvm-project/commit/f92e0d9384763913a745cbe9c757fbb40691dcd1
  Author: Kazushi (Jam) Marukawa <marukawa at nec.com>
  Date:   2020-08-07 (Fri, 07 Aug 2020)

  Changed paths:
    M llvm/lib/Target/VE/VEISelLowering.cpp
    M llvm/lib/Target/VE/VEISelLowering.h
    M llvm/test/CodeGen/VE/addition.ll
    M llvm/test/CodeGen/VE/bitcast.ll
    M llvm/test/CodeGen/VE/branch1.ll
    M llvm/test/CodeGen/VE/bswap.ll
    M llvm/test/CodeGen/VE/cast.ll
    M llvm/test/CodeGen/VE/div.ll
    M llvm/test/CodeGen/VE/int_to_fp.ll
    M llvm/test/CodeGen/VE/left_shift.ll
    M llvm/test/CodeGen/VE/max.ll
    M llvm/test/CodeGen/VE/min.ll
    M llvm/test/CodeGen/VE/multiply.ll
    M llvm/test/CodeGen/VE/rem.ll
    M llvm/test/CodeGen/VE/right_shift.ll
    M llvm/test/CodeGen/VE/rotl.ll
    M llvm/test/CodeGen/VE/rotr.ll
    M llvm/test/CodeGen/VE/select.ll
    M llvm/test/CodeGen/VE/selectccf32c.ll
    M llvm/test/CodeGen/VE/selectccf64c.ll
    M llvm/test/CodeGen/VE/selectcci32.ll
    M llvm/test/CodeGen/VE/selectcci32c.ll
    M llvm/test/CodeGen/VE/selectcci32i.ll
    M llvm/test/CodeGen/VE/selectcci64c.ll
    M llvm/test/CodeGen/VE/setcci32.ll
    M llvm/test/CodeGen/VE/setcci32i.ll
    M llvm/test/CodeGen/VE/subtraction.ll

  Log Message:
  -----------
  [VE] Optimize trunc related instructions

Change to not generate truncate instructions if all use of a truncate
operation don't care about higher bits.  For example, an i32 add
instruction doesn't care about higher 32 bits in 64 bit registers.
Updates regression tests also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D85418