[all-commits] [llvm/llvm-project] ffd8c2: [WebAssembly] Implement truncating vector stores

[Thomas Lively via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: ffd8c23ccb74bbd19ba16e3706a0c5e1e472cca6
      https://github.com/llvm/llvm-project/commit/ffd8c23ccb74bbd19ba16e3706a0c5e1e472cca6
  Author: Thomas Lively <tlively at google.com>
  Date:   2020-07-28 (Tue, 28 Jul 2020)

  Changed paths:
    M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
    M llvm/test/CodeGen/WebAssembly/simd-offset.ll

  Log Message:
  -----------
  [WebAssembly] Implement truncating vector stores

Rather than expanding truncating stores so that vectors are stored one
lane at a time, lower them to a sequence of instructions using
narrowing operations instead, when possible. Since the narrowing
operations have saturating semantics, but truncating stores require
truncation, mask the stored value to manually truncate it before
narrowing. Also, since narrowing is a binary operation, pass in the
original vector as the unused second argument.

Differential Revision: https://reviews.llvm.org/D84377