[all-commits] [llvm/llvm-project] 256d44: [MLIR] [TableGen] Avoid generating an assert which...

[Rahul Joshi via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 256d44811eabd838db79b6a1adfffa4f588750b7
      https://github.com/llvm/llvm-project/commit/256d44811eabd838db79b6a1adfffa4f588750b7
  Author: Rahul Joshi <jurahul at google.com>
  Date:   2020-07-14 (Tue, 14 Jul 2020)

  Changed paths:
    M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp

  Log Message:
  -----------
  [MLIR] [TableGen] Avoid generating an assert which is always true.

- Avoid generating "assert(resultTypes.size() >= 0u)" which is always true

Differential Revision: https://reviews.llvm.org/D83735