[all-commits] [llvm/llvm-project] 0980c9: [X86] Split masked integer vector stores into vXi3...

[Andrea Di Biagio via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 0980c9c6f155d8a06ad839d530636bf109aae34b
      https://github.com/llvm/llvm-project/commit/0980c9c6f155d8a06ad839d530636bf109aae34b
  Author: Andrea Di Biagio <andrea.dibiagio at sony.com>
  Date:   2020-05-19 (Tue, 19 May 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrSSE.td
    M llvm/lib/Target/X86/X86SchedBroadwell.td
    M llvm/lib/Target/X86/X86SchedHaswell.td
    M llvm/lib/Target/X86/X86SchedSandyBridge.td
    M llvm/lib/Target/X86/X86SchedSkylakeClient.td
    M llvm/lib/Target/X86/X86SchedSkylakeServer.td
    M llvm/lib/Target/X86/X86Schedule.td
    M llvm/lib/Target/X86/X86ScheduleAtom.td
    M llvm/lib/Target/X86/X86ScheduleBdVer2.td
    M llvm/lib/Target/X86/X86ScheduleBtVer2.td
    M llvm/lib/Target/X86/X86ScheduleSLM.td
    M llvm/lib/Target/X86/X86ScheduleZnver1.td
    M llvm/lib/Target/X86/X86ScheduleZnver2.td

  Log Message:
  -----------
  [X86] Split masked integer vector stores into vXi32/vXi64 variants (PR45975). NFC

This effectively splits the scheduling WriteVecMaskedStore(Y) classes
into four different classes (one per each variant).

The new VecMaskedStore scheduling classes are now correctly marked as
'unsupported' by the bdver2 and btver2 models.

No functional change intended.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D80201