[all-commits] [llvm/llvm-project] 0df40d: [AArch64][SVE] Add addressing mode for contiguous ...

[kmclaughlin-arm via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 0df40d6ef8b868e0349223a7f2f9f554389cf3f0
      https://github.com/llvm/llvm-project/commit/0df40d6ef8b868e0349223a7f2f9f554389cf3f0
  Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
  Date:   2020-04-21 (Tue, 21 Apr 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    A llvm/test/CodeGen/AArch64/sve-intrinsics-ld1-addressing-mode-reg-imm.ll
    A llvm/test/CodeGen/AArch64/sve-intrinsics-ld1-addressing-mode-reg-reg.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-ld1.ll
    A llvm/test/CodeGen/AArch64/sve-intrinsics-st1-addressing-mode-reg-imm.ll
    A llvm/test/CodeGen/AArch64/sve-intrinsics-st1-addressing-mode-reg-reg.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-st1.ll

  Log Message:
  -----------
  [AArch64][SVE] Add addressing mode for contiguous loads & stores

Summary:
This patch adds the register + register addressing mode for
SVE contiguous load and store intrinsics (LD1 & ST1)

Reviewers: sdesmalen, fpetrogalli, efriedma, rengolin

Reviewed By: fpetrogalli

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, danielkiss, cfe-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78509