[all-commits] [llvm/llvm-project] 0aa0d7: MIR: Use Register

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 0aa0d700678228261e08947914cc1dedd5db8ef5
      https://github.com/llvm/llvm-project/commit/0aa0d700678228261e08947914cc1dedd5db8ef5
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-04-08 (Wed, 08 Apr 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/MIRParser/MIParser.h
    M llvm/lib/CodeGen/MIRParser/MIParser.cpp
    M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

  Log Message:
  -----------
  MIR: Use Register