[all-commits] [llvm/llvm-project] 1b86ad: Use 15 byte long nops on modern Intel processors

[Philip Reames via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 1b86ad27a7d38c3751c1cbe65827cc6819dfb4fd
      https://github.com/llvm/llvm-project/commit/1b86ad27a7d38c3751c1cbe65827cc6819dfb4fd
  Author: Philip Reames <listmail at philipreames.com>
  Date:   2020-03-13 (Fri, 13 Mar 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86.td
    M llvm/test/CodeGen/X86/align-branch-boundary-suppressions.ll
    M llvm/test/MC/X86/align-via-relaxation.s
    M llvm/test/MC/X86/x86_long_nop.s

  Log Message:
  -----------
  Use 15 byte long nops on modern Intel processors

Back in D42616, we switched our default nop length from 15 to 10 bytes because some platforms have painful decode stalls when encountering multiple instruction prefixes. (10 byte long nops come from the fact that prefixes are used to pad after 8 bytes, and some platforms have issues w/more than two prefixes.)

Based on Agner's guides, it appears to be the case that modern Intel (SandyBridge and later) can decode an arbitrary number of prefixes without issue. Intel's guide only provides up to 9 bytes; I read that as providing a safe default for all their chips. Older chips and Atom series have serious decode stalls. I can't find a conclusive reference beyond those two.

Differential Revision: https://reviews.llvm.org/D75945