[all-commits] [llvm/llvm-project] d0fb34: [PowerPC] Replace the PPCISD:: SExtVElems with ISD...

[QingShan Zhang via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: d0fb34dc0967994b71e90351636215976279026a
      https://github.com/llvm/llvm-project/commit/d0fb34dc0967994b71e90351636215976279026a
  Author: QingShan Zhang <qshanz at cn.ibm.com>
  Date:   2020-03-13 (Fri, 13 Mar 2020)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.h
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    M llvm/lib/Target/PowerPC/PPCInstrVSX.td

  Log Message:
  -----------
  [PowerPC] Replace the PPCISD:: SExtVElems with ISD::SIGN_EXTEND_INREG to leverage the combine rules

The PPCISD::SExtVElems was added by commit https://reviews.llvm.org/D34009. However,
we have another ISD node ISD::SIGN_EXTEND_INREG that perfectly match the semantics
of SExtVElems. And the DAGCombiner has some combine rules for SIGN_EXTEND_INREG
that produce better code.

Differential Revision: https://reviews.llvm.org/D70771