[all-commits] [llvm/llvm-project] 619d7d: [DAGCombiner] recognize shuffle (shuffle X, Mask0)...

[RotateRight via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 619d7dc39a1bb875cca77fe06c7dc670c380c861
      https://github.com/llvm/llvm-project/commit/619d7dc39a1bb875cca77fe06c7dc670c380c861
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2020-03-01 (Sun, 01 Mar 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/arm64-dup.ll
    M llvm/test/CodeGen/X86/vector-reduce-mul.ll
    M llvm/test/CodeGen/X86/x86-interleaved-access.ll

  Log Message:
  -----------
  [DAGCombiner] recognize shuffle (shuffle X, Mask0), Mask --> splat X

We get the simple cases of this via demanded elements and other folds,
but that doesn't work if the values have >1 use, so add a dedicated
match for the pattern.

We already have this transform in IR, but it doesn't help the
motivating x86 tests (based on PR42024) because the shuffles don't
exist until after legalization and other combines have happened.
The AArch64 test shows a minimal IR example of the problem.

Differential Revision: https://reviews.llvm.org/D75348