[all-commits] [llvm/llvm-project] b64aa8: AMDGPU/GlobalISel: Fix constant bus violation with...

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: b64aa8c715112ac4b9fd1ae8eb5ecb981ecd091a
      https://github.com/llvm/llvm-project/commit/b64aa8c715112ac4b9fd1ae8eb5ecb981ecd091a
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-02-21 (Fri, 21 Feb 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s32.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s64.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Fix constant bus violation with source modifiers

This looked through copies to find the source modifiers, which may
have been SGPR->VGPR copies added to avoid potential constant bus
violations. Re-insert a copy to a VGPR if this happens.


  Commit: fab4cdea3911b19d1b1819102aee0252cbd4eba4
      https://github.com/llvm/llvm-project/commit/fab4cdea3911b19d1b1819102aee0252cbd4eba4
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-02-21 (Fri, 21 Feb 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
    A llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Select llvm.amdgcn.fmul.legacy


  Commit: 79ff188addeeea127c7a7edd808c5821917d4bb6
      https://github.com/llvm/llvm-project/commit/79ff188addeeea127c7a7edd808c5821917d4bb6
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-02-21 (Fri, 21 Feb 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
    A llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Legalize G_FPOW

There are few differences from the DAG handling. First, the DAG
handling uses a primitive selection pattern instead of custom
legalizing it. Because of this, this makes use of source modifiers
while the DAG does not.

Also instead of promoting f16, try to use the f16 log/exp. There's no
f16 fmul_legacy, so widen just for the multiply, although I'm not sure
that's the best solution.


  Commit: ac7abe0ba9ae4c6a2248cc3ef4e4fe7e6d270105
      https://github.com/llvm/llvm-project/commit/ac7abe0ba9ae4c6a2248cc3ef4e4fe7e6d270105
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-02-21 (Fri, 21 Feb 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Manually select G_BUILD_VECTOR_TRUNC

We have patterns for s_pack* selection, but they assume the inputs are
a build_vector with 16-bit inputs, not a truncating build
vector. Since there's still outstanding work for how to handle
mismatched result and source element vector operations, and since I'm
trying a different packed vector strategy than SelectionDAG, just
manually select this for now.


Compare: https://github.com/llvm/llvm-project/compare/5125803d344b...ac7abe0ba9ae