[all-commits] [llvm/llvm-project] bfbfa1: GlobalISel: Lower s64->s16 G_FPTRUNC

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: bfbfa18591db4eff68a6692b8503efd1571cdb88
      https://github.com/llvm/llvm-project/commit/bfbfa18591db4eff68a6692b8503efd1571cdb88
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-02-14 (Fri, 14 Feb 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir

  Log Message:
  -----------
  GlobalISel: Lower s64->s16 G_FPTRUNC

This is more or less directly ported from the AMDGPU custom lowering
for FP_TO_FP16. I made a few minor fixups (using G_UNMERGE_VALUES
instead of creating shift/trunc to extract the two halves, and zexting
an inverted compare instead of select_cc).

This also does not include the fast math expansion the DAG which
converts to f32 and then to f16. I think that belongs in a
pre-legalize combine instead.