[all-commits] [llvm/llvm-project] 91e758: AMDGPU: Move permlane discard vdst_in optimization

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 91e758b7329b4ff134684e661af93a85c436a460
      https://github.com/llvm/llvm-project/commit/91e758b7329b4ff134684e661af93a85c436a460
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-16 (Thu, 16 Jan 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td

  Log Message:
  -----------
  AMDGPU: Move permlane discard vdst_in optimization

This case can be handled as a regular selection pattern, so move it
out of the weird post-isel folding code which doesn't have an exactly
equivalent place in GlobalISel.

I think it doesn't make much sense to do this optimization here
though, and it would be more useful in instcombine. There's not really
any new information that will be gained during lowering since these
inputs were known from the beginning.


  Commit: 3ef8cdf6660fc20baeb09eae5008b741f178b624
      https://github.com/llvm/llvm-project/commit/3ef8cdf6660fc20baeb09eae5008b741f178b624
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-01-16 (Thu, 16 Jan 2020)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll

  Log Message:
  -----------
  AMDGPU: Do permlane16 vdst_in discard optimization in InstCombine

There's more potential value to discarding the source value earlier,
since we always know the value of the fi/bc bits.


Compare: https://github.com/llvm/llvm-project/compare/fa4112fffc6b...3ef8cdf6660f