[all-commits] [llvm/llvm-project] c06e53: [X86] Use 128-bit vector instructions for f32/f64-...

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: c06e53119b1f04696fbcf710aaa0818cbfc99600
      https://github.com/llvm/llvm-project/commit/c06e53119b1f04696fbcf710aaa0818cbfc99600
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2019-12-24 (Tue, 24 Dec 2019)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/scalar-fp-to-i64.ll

  Log Message:
  -----------
  [X86] Use 128-bit vector instructions for f32/f64->i64 conversions on 32-bit targets with avx512dq and avx512vl instructions.

On 32-bit targets we can't use the scalar instruction so we
insert the scalar into a vector and use packed conversions.
Previously we used either v4f32->v4i64 or v4f64->v4i64 to avoid
some complexity creating target specific ISD opcodes for
v4f32->v2i64. But this causes extra vzeroupper instructions and
possibly frequency throttling on Intel CPUs.

This patch changes this to create a 128-bit vector and uses a
target specific ISD opcode if needed.