[all-commits] [llvm/llvm-project] 364b8f: [AArch64] Improve codegen of volatile load/store o...

[Victor Campos via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 364b8f5fbe0ac496931dcbd6f0493781f0677e82
      https://github.com/llvm/llvm-project/commit/364b8f5fbe0ac496931dcbd6f0493781f0677e82
  Author: Victor Campos <Victor.Campos at arm.com>
  Date:   2019-12-18 (Wed, 18 Dec 2019)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/cmpxchg-O0.ll
    A llvm/test/CodeGen/AArch64/i128_volatile_load_store.ll

  Log Message:
  -----------
  [AArch64] Improve codegen of volatile load/store of i128

Summary:
Instead of generating two i64 instructions for each load or store of a
volatile i128 value (two LDRs or STRs), now emit a single LDP or STP.

Reviewers: labrinea, t.p.northover, efriedma

Reviewed By: efriedma

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69559