[all-commits] [llvm/llvm-project] 256ad9: AMDGPU: Reuse carry out register during FI elimina...

[Austin Kerbow via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 256ad954a9e453e55b950207ca433da8da883a33
      https://github.com/llvm/llvm-project/commit/256ad954a9e453e55b950207ca433da8da883a33
  Author: Austin Kerbow <Austin.Kerbow at amd.com>
  Date:   2019-11-28 (Thu, 28 Nov 2019)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir

  Log Message:
  -----------
  AMDGPU: Reuse carry out register during FI elimination

Summary:
Pre gfx9 we need to scavenge a 64-bit SGPR to use as the carry out for an Add.
If only one SGPR was available this crashed when trying to scavenge another
32bit SGPR to materialize the offset.

Instead, reuse a 32-bit SGPR from the carry out as the offset register.

Also prefer to use vcc for the unused carry out when it is available.

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70614