[all-commits] [llvm/llvm-project] 69fcfb: AMDGPU: Try to commute sub of boolean ext

Matt Arsenault via All-commits all-commits at lists.llvm.org
Fri Nov 15 00:39:52 PST 2019


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 69fcfb7d3597e0cdb5554b4e672e9032b411b167
      https://github.com/llvm/llvm-project/commit/69fcfb7d3597e0cdb5554b4e672e9032b411b167
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2019-11-15 (Fri, 15 Nov 2019)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll

  Log Message:
  -----------
  AMDGPU: Try to commute sub of boolean ext

Avoids another regression in a future patch.


  Commit: 31479d868e2ace47021324c387d0460cfa737296
      https://github.com/llvm/llvm-project/commit/31479d868e2ace47021324c387d0460cfa737296
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2019-11-15 (Fri, 15 Nov 2019)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
    M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
    M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll

  Log Message:
  -----------
  AMDGPU: Change boolean content type to 0 or 1

The usage of target boolean checks is overly inflexible, since sext
and zext of a compare are equally cheap. The choice is arbitrary, but
using 0/1 to some degree is the choice of lower resistance since
that's what most targets use. This enables a few combines that don't
bother to support ZeroOrNegativeOneBooleanContent.


Compare: https://github.com/llvm/llvm-project/compare/bc276c6379fd...31479d868e2a


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