[all-commits] [llvm/llvm-project] 0f04ff: [X86] Only pass v64i8/v32i16 as v16i32 on non-avx5...

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 0f04ffc073deeb1738f1d9bd5c8161d13fe42592
      https://github.com/llvm/llvm-project/commit/0f04ffc073deeb1738f1d9bd5c8161d13fe42592
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2019-11-12 (Tue, 12 Nov 2019)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp

  Log Message:
  -----------
  [X86] Only pass v64i8/v32i16 as v16i32 on non-avx512bw targets if the v16i32 type won't be split by prefer-vector-width=256

Otherwise just let the v64i8/v32i16 types be split to v32i8/v16i16.

In reality this shouldn't happen because it means we have a 512-bit
vector argument, but min-legal-vector-width says a value less than
512. But a 512-bit argument should have been factored into the
preferred vector width.


  Commit: 3e1aee2ba717529b651a79ed4fc7e7147358043f
      https://github.com/llvm/llvm-project/commit/3e1aee2ba717529b651a79ed4fc7e7147358043f
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2019-11-12 (Tue, 12 Nov 2019)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/min-legal-vector-width.ll

  Log Message:
  -----------
  [X86] Don't consider v64i1 as a legal type unless v64i8 is also a legal type.

This avoids some nasty issues with argument passing and lowering of
arbitrary v64i8 shuffles.


Compare: https://github.com/llvm/llvm-project/compare/38c356176b53...3e1aee2ba717